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publication date : november 2011 1 < dual-in-line package intelligent power module > PS219B3-S/-as/-cs PS219B3-St/-ast/-cst transfer molding type insulated type outline main function and ratings ? 3 phase dc/ac inverter ? 600v / 10a (cstbt) ? n-side igbt open emitter ? built-in bootstrap diodes with current limiting resistor application ? ac 100~240vrms(dc voltage:400v or below) class low power motor control type name PS219B3-S/-as/-cs with temperature output function PS219B3-St/-ast/-cst with ot protection function integrated drive, protection and system control functions for p-side : drive circuit, high voltage high-speed level shifting, control supply under-voltage (uv) protection for n-side : drive circuit, control supply under-voltage protection (uv), short circuit protection (sc), over temperature protection (ot, -st/-ast/-cst only) fault signaling : corresponding to sc fault (n-side igbt), uv fault (n-side supply) temperature output : outputting lvic temperature by analog signal (-s/-as/-cs only) input interface : 3, 5v line, schmitt trigger receiver circuit (high active) ul recognized : ul1557 file e323585 internal circuit long terminal type(-as/-ast) v ufb (2) v vfb (3) v wfb (4) w(21) v p (6) w p (7) u p (5) v p1 (8) igbt1 igbt2 igbt3 di1 di2 di3 v nc (9) u n (10) v n (11) w n (12) f o (14) v n1 (13) v nc (16) nw(18) cin(15) igbt4 igbt5 igbt6 di4 di5 di6 nu(20) nv(19) lvic hvic v(22) u(23) p(24) v ot (17) built-in temperature output type: v ot (-s/-as/-cs) built-in ot type: nc (no connection) (-st/-ast/-cst)
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 2 maximum ratings (t j = 25c, unless otherwise noted) inverter part symbol parameter condition ratings unit v cc supply voltage applied between p-nu,nv,nw 450 v v cc(surge) supply voltage (surge) applied between p-nu,nv,nw 500 v v ces collector-emitter voltage 600 v i c each igbt collector current t c = 25c 10 a i cp each igbt collector current (peak) t c = 25c, less than 1ms 20 a p c collector dissipation t c = 25c, per 1 chip 27.0 w t j junction temperature (note 1) -20~+150 c note1: the maximum junction temperature rating of built-in power chips is 150c(@tc 100c).however, to ensure safe operation of dipipm, the average junction temperature should be limited to tj(ave) 125c (@tc 100c). control (protection) part symbol parameter condition ratings unit v d control supply voltage applied between v p1 -v pc , v n1 -v nc 20 v v db control supply voltage applied between v ufb -v ufs , v vfb -v vfs , v wfb -v wfs 20 v v in input voltage applied between u p , v p , w p -v pc , u n , v n , w n -v nc -0.5~v d +0.5 v v fo fault output supply voltage applied between f o -v nc -0.5~v d +0.5 v i fo fault output current sink current at f o terminal 1 ma v sc current sensing input voltage applied between cin-v nc -0.5~v d +0.5 v total system symbol parameter condition ratings unit v cc(prot) self protection supply voltage limit (short circuit protection capability) v d = 13.5~16.5v, inverter part t j = 125c, non-repetitive, less than 2 s 400 v t c module case operation temperature measurement point of tc is provided in fig.1 -20~+100 c t stg storage temperature -40~+125 c v iso isolation voltage 60hz, sinusoidal, ac 1minute, between connected all pins and heat-sink plate 1500 v rms fig. 1: t c measurement point thermal resistance limits symbol parameter condition min. typ. max. unit r th(j-c)q inverter igbt part (per 1/6 module) - - 3.7 k/w r th(j-c)f junction to case thermal resistance (note 2) inverter fwdi part (per 1/6 module) - - 4.5 k/w note 2: grease with good thermal conductivity and long-term endurance should be applied evenly with about +100 m~+200 m on the contacting surface of dipipm and heat-sink. the contacting thermal resistance between dipipm case and heat sink rth(c-f) is determined by the thickne ss and the thermal conductivity of the applied grease. for reference, rth(c-f) is about 0.3k/w (per 1/6 module, grease thickness: 20 m, thermal conductivity: 1.0w/m?k). control terminals dipipm tc point igbt chip position heat sink side 11.6mm 3mm power terminals
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 3 electrical characteristics (t j = 25c, unless otherwise noted) inverter part limits symbol parameter condition min. typ. max. unit t j = 25c - 1.50 2.00 v ce(sat) collector-emitter saturation voltage v d =v db = 15v, v in = 5v, i c = 10a t j = 125c - 1.60 2.10 v v ec fwdi forward voltage v in = 0v, -i c = 10a - 1.70 2.20 v t on 0.75 1.35 1.95 s t c(on) - 0.35 0.55 s t off - 1.40 2.00 s t c(off) - 0.30 0.60 s t rr switching times v cc = 300v, v d = v db = 15v i c = 10a, t j = 125c, v in = 0 ? 5v inductive load (upper-lower arm) - 0.30 - s t j = 25c - - 1 i ces collector-emitter cut-off current v ce =v ces t j = 125c - - 10 ma control (protection) part limits symbol parameter condition min. typ. max. unit v d =15v, v in =0v - - 2.80 i d total of v p1 -v nc , v n1 -v nc v d =15v, v in =5v - - 2.80 v d =v db =15v, v in =0v - - 0.10 i db circuit current each part of v ufb -u, v vfb -v, v wfb -w v d =v db =15v, v in =5v - - 0.10 ma v sc(ref) short circuit trip level v d = 15v (note 3) 0.43 0.48 0.53 v uv dbt trip level 7.0 10.0 12.0 v uv dbr p-side control supply under-voltage protection(uv) reset level 7.0 10.0 12.0 v uv dt trip level 10.3 - 12.5 v uv dr n-side control supply under-voltage protection(uv) t j 125c reset level 10.8 - 13.0 v lvic temperature=90 ? c 2.63 2.77 2.91 v v ot temperature output (-s/-as/-cs only) pull down r=5k ? (note 4) lvic temperature=25 ? c 0.88 1.13 1.39 v ot t v d = 15v trip level 100 120 140 c ot rh overt temperature protection (ot, -st/-ast/-cst only) (note5) detect lvic temperature hysteresis of trip-reset - 10 - c v foh v sc = 0v, f o terminal pulled up to 5v by 10k ? 4.9 - - v v fol fault output voltage v sc = 1v, i fo = 1ma - - 0.95 v t fo fault output pulse width (note 6) 20 - - s i in input current v in = 5v 0.70 1.00 1.50 ma v th(on) on threshold voltage - 2.10 2.60 v th(off) off threshold voltage 0.80 1.30 - v th(hys) on/off threshold hysteresis voltage applied between u p , v p , w p , u n , v n , w n -v nc 0.35 0.65 - v v f bootstrap di forward voltage i f =10ma including voltage drop by limiting resistor (note 7) 1.1 1.7 2.3 v r built-in limiting resistance included in bootstrap di 80 100 120 ? note 3 : sc protection works only for n-side igbt. please select the external shunt resistance such that the sc trip-level is l ess than 1.7 times of the current rating. note 4 : dipipm don't shutdown igbts and output fault signal automatically when temperature rises excessively. when temperature exc eeds the protective level that user defined, controller (mcu) should stop the dipipm. temperature of lvic vs. v ot output characteristics is described in fig. 3. 5 : when the lvic temperature exceeds ot trip temperature level(ot t ), ot protection works and fo outputs. in that case if the heat sink dropped off or fixed loosely, don't reuse that dipipm. (there is a possibility that junction temperature of power chips exceeded maximum tj(150 ? c). 6 : fault signal fo outputs when sc, uv or ot protection works. fo pulse width is different for each protection modes. at sc fa ilure, fo pulse width is a fixed width (=minimum 20 s), but at uv or ot failure, fo outputs continuously until recovering from uv or ot state. (but minimum fo pulse width is 20 s.) 7 : the characteristics of bootstrap di is described in fig.2. fig. 2 characteristics of bootstrap di v f -i f curve (@ta=25 ? c) including voltage drop by limiting resistor (right chart is enlarged chart.) 0 20 40 60 80 100 120 140 160 0123456789101112131415 v f [v] i f [ma] 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 v f [v] i f [ma]
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 4 fig. 3 temperature of lvic vs. v ot output characteristics 2.77 2.63 2.91 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 60 70 80 90 100 110 120 lvic temperature (c) v ot output (v) _ ty p. max . min. fig. 4 v ot output circuit (1) it is recommended to insert 5k ? or more (5.1k ? is recommended) pull down resistor for getting linear output characteristics at low temperature below room temperature. when the pull down resistor is inserted between v ot and v nc (control gnd), the extra circuit current, which is calculated approximately by v ot output voltage divided by pull down resistance, flows as lvic circuit current continuously. in the case of using v ot for detecting high temperature over room temperature only, it is unnecessary to insert the pull down resistor. (2) in the case of using v ot with low voltage controller like 3.3v mcu, v ot output might exceed control supply voltage 3.3v when temperature rises excessively. if system uses low voltage controller, it is recommended to insert a clamp di between control su pply of the controller and v ot output for preventing over voltage destruction. (3) in the case of not using v ot , leave v ot output nc (no connection). refer the application note for super mini dipipm ver.5 series about the usage of v ot . ref v ot temperature signal v nc inside lvic of dipipm mcu 5k ?
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 5 mechanical characteristics and ratings limits parameter condition min. typ. max. unit mounting torque mounting screw : m3 (note 8) recommended 0.69n ? m 0.59 0.69 0.78 n ? m terminal pulling strength control terminal: load 4.9n power terminal: load 9.8n eiaj-ed-4701 10 - - s terminal bending strength control terminal: load 2.45n power terminal: load 4.9n 90deg. bend eiaj-ed-4701 2 - - times weight - 8.5 - g heat-sink flatness (note 9) -50 - 100 m note 8: plain washers (iso 7089~7094) are recommended. note 9: measurement point of heat sink flatness recommended operation conditions limits symbol parameter condition min. typ. max. unit v cc supply voltage applied between p-nu, nv, nw 0 300 400 v v d control supply voltage applied between v p1 -v pc , v n1 -v nc 13.5 15.0 16.5 v v db control supply voltage applied between v ufb -v ufs , v vfb -v vfs , v wfb -v wfs 13.0 15.0 18.5 v v d , v db control supply variation -1 - +1 v/ s t dead arm shoot-through blocking time for each input signal 1.0 - - s f pwm pwm input frequency t c 100c, t j 125c - - 20 khz f pwm = 5khz - - 5.5 i o allowable r.m.s. current v cc = 300v, v d = 15v, p.f = 0.8, sinusoidal pwm t c 100c, t j 125c (note10) f pwm = 15khz - - 3.5 arms pwin(on) 0.7 - - pwin(off) minimum input pulse width (note 11) 0.7 - - s v nc v nc variation between v nc -nu, nv, nw (including surge) -5.0 - +5.0 v t j junction temperature -20 - +125 c note 10: allowable r.m.s. current depends on the actual application conditions. 11: dipipm might not make response if the input signal pulse width is less than pwin(on), pwin(off). 4.6mm - + heat sink side heat sink side measurement position 17.5mm + -
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 6 fig. 5 timing charts of the dipipm protective functions [a] short-circuit protection (n-side only with the external shunt resistor and rc filter) a1. normal operation: igbt on and outputs current. a2. short circuit current detection (sc trigger) (it is recommended to set rc time constant 1.5~2.0 s so that igbt shut down within 2.0 s when sc.) a3. all n-side igbt's gates are hard interrupted. a4. all n-side igbts turn off. a5. f o outputs for t fo =minimum 20 s. a6. input = ?l?: igbt off a7. fo finishes output, but igbts don't turn on until inputting next on signal (l ? h). (igbt of each phase can return to normal state by inputting on signal to each phase.) a8. normal operation: igbt on and outputs current. [b] under-voltage protection (n-side, uv d ) b1. control supply voltage v d exceeds under voltage reset level (uv dr ), but igbt turns on by next on signal (l ? h). (igbt of each phase can return to normal state by inputting on signal to each phase.) b2. normal operation: igbt on and outputs current. b3. v d level drops to under voltage trip level. (uv dt ). b4. all n-side igbts turn off in spite of control input condition. b5. fo outputs for t fo =minimum 20 s , but output is extended during v d keeps below uv dr . b6. v d level reaches uv dr . b7. normal operation: igbt on and outputs current. lower-side control input protection circuit state internal igbt gate output current ic sense voltage of the shunt resistor error output fo sc trip current level a2 set reset sc reference voltage a1 a3 a6 a7 a4 a8 a5 delay by rc filtering uv dr reset set reset uv dt b1 b2 b3 b4 b6 b7 b5 control input protection circuit state control supply voltage v d output current ic error output fo
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 7 [c] under-voltage protection (p-side, uv db ) c1. control supply voltage v db rises. after the voltage reaches under voltage reset level uv dbr , igbt turns on by next on signal (l ? h). c2. normal operation: igbt on and outputs current. c3. v db level drops to under voltage trip level (uv dbt ). c4. igbt of the correspond phase only turns off in spite of control input signal level, but there is no f o signal output. c5. v db level reaches uv dbr . c6. normal operation: igbt on and outputs current. [d] over temperature protection (n-side, detecting lvic temperature) d1. normal operation: igbt on and outputs current. d2. lvic temperature exceeds over temperature trip level(ot t ). d3. all n-side igbts turn off in spite of control input condition. d4. fo outputs for t fo =minimum 20 s , but output is extended during lvic temperature keeps over ot t . d5. lvic temperature drops to over temperature reset level. d6. normal operation: igbt turns on by next on signal (l ? h). (igbt of each phase can return to normal state by inputting on signal to each phase.) control input protection circuit state control supply voltage v db output current ic error output fo uv dbr reset set reset uv dbt keep high-level (no fault output) c1 c2 c3 c4 c5 c6 set reset ot t d1 d2 d3 d5 d6 d4 ot t - ot rh control input protection circuit state temperature of lvic output current ic error output fo
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 8 fig. 6 example of application circuit (1) if control gnd is connected with power gnd by common broad pattern, it may cause malfunction by power gnd fluctuation. it is recommended to connect control gnd and power gnd at only a point n1 (near the terminal of shunt resistor). (2) it is recommended to insert a zener diode d1(24v/1w) between each pair of control supply terminals to prevent surge destruc tion. (3) to prevent surge destruction, the wiring between the smoothing capacitor and the p, n1 terminals should be as short as poss ible. generally a 0.1-0.22 f snubber capacitor c3 between the p-n1 terminals is recommended. (4) r1, c4 of rc filter for preventing protection circuit malfunction is recommended to select tight tolerance, temp-compensate d type. the time constant r1c4 should be set so that sc current is shut down within 2 s. (1.5 s~2 s is general value.) sc interrupting time might vary with the wiring pattern, so the enough evaluation on the real system is necessary. (5) to prevent malfunction, the wiring of a, b, c should be as short as possible. (6) the point d at which the wiring to cin filter is divided should be near the terminal of shunt resistor. nu, nv, nw terminal s should be connected at near nu, nv, nw terminals. (7) all capacitors should be mounted as close to the terminals as possible. (c1: good temperature, frequency characteristic ele ctrolytic type and c2:0.22 -2 f, good temperature, frequency and dc bias characteristic ceramic type are recommended.) (8) input drive is high-active type. there is a minimum 3.3k ? pull-down resistor in the input circuit of ic. to prevent malfunction, the wiring of each input should be as short as possible. when using rc coupling circuit, make sure the input signal level meet the turn-on and turn-off threshold voltage. (9) fo output is open drain type. it should be pulled up to mcu or control power supply (e.g. 5v,15v) by a resistor that makes i fo up to 1ma. (i fo is estimated roughly by the formula of control power supply voltage divided by pull-up resistance. in the case of pulled up to 5v, 10k ? (5k ? or more) is recommended.) (10) thanks to built-in hvic, direct coupling to mcu without any opto-coupler or transformer isolation is possible. (11) two v nc terminals (9 & 16 pin) are connected inside dipipm, please connect either one to the 15v power supply gnd outside and leave another one open. (12) if high frequency noise superimposed to the control supply line, ic malfunction might happen and cause dipipm erroneous op eration. to avoid such problem, line ripple voltage should meet dv/dt +/-1v/ s, vripple 2vp-p. (13) for dipipm, it isn't recommended to drive same load by parallel connection with other phase igbt or other dipipm. d1 + + mcu c2 15v v d m c4 r1 shunt resistor n1 b c 5v a c2 v ufb (2) v vfb (3) v wfb (4) + u n (10) v n (11) w n (12) fo(14) v n1 (13) v nc (16) p(24) u(23) w(21) lvic v(22) v p (6) w p (7) u p (5) v p1 (8) cin(15) igbt1 igbt2 igbt3 di1 di2 di3 c1 c1 c2 + d d1 v nc (9) c3 hvic nw(18) igbt4 igbt5 igbt6 di4 di5 di6 nu(20) nv(19) power gnd wiring control gnd wiring v ot (17) 5k ? long gnd wiring here might generate noise to input signal and cause igbt malfunction. long wiring here might cause sc level fluctuation and malfunction. long wiring here might cause short circuit failure bootstrap negative electrodes should be connected to u,v,w terminals directly and separated from the main output wires built-in temperature output type only (-s/-as/-cs) +
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 9 fig. 7 mcu i/o interface circuit fig. 8 pattern wiring around the shunt resistor fig. 9 pattern wiring around the shunt resistor (for the case of open emitter) when dipipm is operated with three shunt resistors, voltage of each shunt resistor cannot be input to cin terminal directly. in that case, it is necessary to use the external protection circuit as below. (1) it is necessary to set the time constant r f c f of external comparator input so that igbt stops within 2 s when short circuit occurs. sc interrupting time might vary with the wiring pattern, comparator speed and so on. (2) it is recommended for the threshold voltage vref to set to the same rating of short circuit trip level (vsc(ref): typ. 0.48 v). (3) select the external shunt resistance so that sc trip-level is less than specified value (=1.7 times of rating current). (4) to avoid malfunction, the wiring a, b, c should be as short as possible. (5) the point d at which the wiring to comparator is divided should be close to the terminal of shunt resistor. (6) or output high level when protection works should be over 0.53v (=maximum vsc(ref) rating). u p ,v p ,w p ,u n ,v n ,w n fo v nc (logic) dipipm mcu 10k 5v line 3.3k ( min ) note) design for input rc filter depends on pwm control scheme used in the application and wiring impedance of the printed circuit board. dipipm input signal interface integrates a minimum 3.3k ? pull-down resistor. therefore, when inserting rc filter, it is necessary to satisfy turn-on threshold voltage requirement. fo output is open drain type. it should be pulled up to control power supply (e.g. 5v, 15v) with a resistor that makes fo sink current i fo 1ma or less. in the case of pulled up to 5v supply, 10k ? 5k ? or more is recommended. p v u w n-side igbt p-side igbt drive circuit dipipm v nc nw drive circuit cin nv nu - vref + vref vref comparators (open collector output type) external protection circuit protection circuit shunt resistors r f c f 5v b a c or output d n1 - + - + wiring inductance should be less than 10nh. inductance of a copper pattern with length=17mm, width=3mm is about 10nh. nu, nv, nw should be connected each other at near terminals. n1 v nc nu nv nw dipipm v nc gnd wiring from v nc should be connected close to the terminal of shunt resistor. shunt resistor dipipm nu nv nw n1 low inductance shunt resistor like surface mounted (smd) type is recommended. gnd wiring from v nc should be connected close to the terminal of shunt resistor. shunt resistors each wiring inductance should be less than 10nh. inductance of a copper pattern with length=17mm, width=3mm is about 10nh.
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 10 fig. 10 package outlines dimensions in mm short terminal type (-s/-st) long terminal type (-as/-ast) 1) 9 & 16 pins (v nc ) are connected inside dipipm, please connect either one to the control power supply gnd outside and leave another one open. 2) no.17 is v ot for built-in temperature output function type (-s/-as/-cs) and nc (no connection) for built-in ot protection function type (-s t/-ast/-cst). qr code is registered trademark of denso wave incorporated in japan and other countries. terminal code 1-a nc(v nc ) 1-b nc(v p1 ) 2 v ufb 3 v vfb 4 v wfb 5 u p 6 v p 7 w p 8 v p1 9 v nc *1 10 u n 11 v n 12 w n 13 v n1 14 fo 15 cin 16 v nc *1 17 nc / v ot *2 18 nw 19 nv 20 nu 21 w 22 v 23 u 24 p 25 nc terminal code 1-a nc(v nc ) 1-b nc(v p1 ) 2 v ufb 3 v vfb 4 v wfb 5 u p 6 v p 7 w p 8 v p1 9 v nc *1 10 u n 11 v n 12 w n 13 v n1 14 fo 15 cin 16 v nc *1 17 nc / v ot *2 18 nw 19 nv 20 nu 21 w 22 v 23 u 24 p 25 nc
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 11 control side zigzag terminal type (-cs/-cst) 1) 9 & 16 pins (v nc ) are connected inside dipipm, please connect either one to the control power supply gnd outside and leave another one open. 2) no.17 is v ot for built-in temperature output function type (-s/-as/-cs) and nc (no connection) for built-in ot protection function type (-s t/-ast/-cst). terminal code 1-a nc(v nc ) 1-b nc(v p1 ) 2 v ufb 3 v vfb 4 v wfb 5 u p 6 v p 7 w p 8 v p1 9 v nc *1 10 u n 11 v n 12 w n 13 v n1 14 fo 15 cin 16 v nc *1 17 nc / v ot *2 18 nw 19 nv 20 nu 21 w 22 v 23 u 24 p 25 nc
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 12 revision record rev. date page revised contents 1 11/15/2011 - new
< dual-in-line package intelligent power module > PS219B3-S/-as/-cs/-st/-ast/-cst transfer molding type insulated type publication date : november 2011 13 ? 2011 mitsubishi electric corporation. all rights reserved. dipipm and cstbt are registered trademarks of mitsubishi eletric corporation. keep safety first in your circuit designs! mitsubishi electric corporation puts the maximum effo rt into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (i ii) prevention against any malfunction or mishap. notes regarding these materials ?these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customer?s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. ?mitsubishi electric corporation assumes no respons ibility for any damage, or infringement of any third-party?s rights, originating in the use of any pr oduct data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. ?all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the ti me of publication of these materials, and are subject to change by mitsubishi electric corporation without not ice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product dist ributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. mitsubishi electric corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by mitsubishi electric corporation by various means, including the mitsubishi semiconductor home page (http://www.mitsubishielectric.com/). ?when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to eval uate all information as a total system before making a final decision on the applicability of the informatio n and products. mitsubishi electric corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. ?mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aer ospace, nuclear, or undersea repeater use. ?the prior written approval of mitsubishi electric corpor ation is necessary to reprin t or reproduce in whole or in part these materials. ?if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other t han the approved destination. any diversion or re-export contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. ?please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for further details on these materials or the products contained therein.

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